| 005 - DATE AND TIME OF LATEST TRANSACTION |
| control field |
20260313171917.0 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
| International Standard Book Number |
9781119778097 |
| Qualifying information |
(ebook) |
|
| International Standard Book Number |
9781119778066 |
| Qualifying information |
(pdf) |
|
| International Standard Book Number |
9781119778080 |
| Qualifying information |
(epub) |
|
| Canceled/invalid ISBN |
9781119778042 |
| Qualifying information |
(hardback) |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
| Classification number |
TK7874.75 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
| Classification number |
E 621.395028553 T835 2022 |
| Edition number |
23 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
| Personal name |
Tripathi, Suman Lata, |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
| Title |
Digital VLSI design and simulation with Verilog / |
| Statement of responsibility, etc. |
Suman Lata Tripathi, Sobhit Saxena, Sanjeet Kumar Sinha, Govind Singh Patel. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE |
| Place of production, publication, distribution, manufacture |
Hoboken, NJ : |
| Name of producer, publisher, distributor, manufacturer |
John Wiley & Sons, |
| Date of production, publication, distribution, manufacture, or copyright notice |
2022. |
| 300 ## - PHYSICAL DESCRIPTION |
| Extent |
1 online resource |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
| Bibliography, etc. note |
Includes bibliographical references and index. |
| 520 ## - SUMMARY, ETC. |
| Summary, etc. |
"The integrated circuits are now growing its importance in every electronic system that needs an efficient VLSI architecture designs with low power consumption, compress chip area, speed, and operating frequency. The challenge for VLSI system designers is to optimize the hardware-software integration for lowering the total cost of acquisition of products. So, there is a demand for better technological solutions for advanced VLSI architectures that can be done through hardware description language (HDL). Verilog HDL is one of the programming languages that can give better solutions to this new era of the VLSI industry. The prefabrication design and analysis of such advanced VLSI architecture can be easily implemented with Verilog HDL with the available software tools like Xilinx and Cadence. The presented book mainly deals with fundamental concepts of digital design along with their design verification with Verilog HDL. The book will be a common source of knowledge for the beginners as well as research seeking students working in the area of VLSI design covering fundamentals of digital design from switch level to FPGA based implementation using hardware description language (HDL). The book is summarized in 10 chapters. Chapter 1 and 2 describes the fundamental concepts behind digital circuit design including combinational and sequential circuit design. Chapter 3 to chapter 8 is focused on sequential and combinational circuit design using Verilog HDL at a different level of abstractions in Verilog coding. Chapter 9 includes implementation of any logic function using a programmable logic device like PLD, CPLD or FPGA, etc. Chapter 10 covers a few real-time examples of digital circuit design using Verilog. Chapter 11 focuses on System Verilog, distinct features, computing Verilog and System Verilog with design example."-- |
| Assigning source |
Provided by publisher. |
| 526 ## - STUDY PROGRAM INFORMATION NOTE |
| Classification |
E-Book |
| 588 ## - SOURCE OF DESCRIPTION NOTE |
| Source of description note |
Description based on print version record and CIP data provided by publisher; resource not viewed. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
| Topical term or geographic name entry element |
Integrated circuits |
| General subdivision |
Very large scale integration |
| -- |
Design and construction. |
|
| Topical term or geographic name entry element |
Verilog (Computer hardware description language) |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
| Personal name |
Saxena, Sobhit, |
| Relator term |
author. |
|
| Personal name |
Sinha, Sanjeet Kumar, |
| Relator term |
author. |
|
| Personal name |
Patel, Govind Singh, |
| Relator term |
author. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
| Relationship information |
Print version: |
| Main entry heading |
Tripathi, Suman Lata. |
| Title |
Digital VLSI design and simulation with Verilog |
| Place, publisher, and date of publication |
Hoboken, NJ : John Wiley & Sons, 2022 |
| International Standard Book Number |
9781119778042 |
| Record control number |
(DLC) 2021020790 |
| 856 ## - ELECTRONIC LOCATION AND ACCESS |
| Uniform Resource Identifier |
https://drive.google.com/file/d/12zNkyZsH4CvdU-0F_VggW-c8E8j150sq/view?usp=sharing |
| 906 ## - LOCAL DATA ELEMENT F, LDF (RLIN) |
| a |
7 |
| b |
cbc |
| c |
orignew |
| d |
1 |
| e |
ecip |
| f |
20 |
| g |
y-gencatlg |
| 942 ## - ADDED ENTRY ELEMENTS |
| Source of classification or shelving scheme |
|
| Item type |
eBook |